Semiconductor component manufacturers are constantly striving to improve component performance while lowering their cost of manufacture. One technique for improving performance has been to manufacture semiconductor components using Silicon-On-Insulator (SOI) technology. In this technology, an SOI substrate comprises a dielectric material sandwiched between a relatively thin layer of semiconductor material and a thicker layer of semiconductor material. Semiconductor devices are formed in the thin layer of semiconductor material, whereas the thicker layer of semiconductor material provides support.
Semiconductor devices formed from SOI substrates have lower parasitic capacitances and increased drain currents than similar devices manufactured from bulk silicon substrates. For example, insulated gate field effect transistors or devices manufactured from SOI substrates have a lower source/drain capacitance, which results in faster performance. In addition, oxide isolation is more readily achieved using SOI technology than bulk silicon technology, which shrinks the sizes of the devices and allows for a greater packing density. Other advantages of SOI technology include lower voltage operation, latch-up immunity, and a higher immunity to “soft error” failure.
Although there are many advantages of manufacturing semiconductor devices using SOI technology, there are also several drawbacks. For example, when analog circuits and high performance logic circuits are manufactured using an SOI substrate, the manufacturing processes are typically optimized for the high performance logic circuits, which degrades the performance of the analog circuits. Further, because the dielectric material of an SOI substrate has a low thermal conductivity, heat generated by these types of devices is not readily dissipated away from the devices. Although the heat degrades the performance of both analog and high performance logic circuits, the analog circuits are more sensitive to thermal stresses than the logic circuits.
Accordingly, what is needed is a semiconductor component and a method for manufacturing the semiconductor component using SOI technology that includes both analog and logic circuitry. It would be of further advantage for the method to be time and cost efficient.